Datasheet4U Logo Datasheet4U.com

AD7944 - PulSAR 15.5 mW ADC

General Description

The AD7944 is a 14-bit, 2.5 MSPS successive approximation analog-to-digital converter (SAR ADC).

It contains a low power, high speed, 14-bit sampling ADC, an internal conversion clock, an internal reference (and buffer), error correction circuits, and a versatile serial interface port.

Key Features

  • 14-bit resolution with no missing codes Throughput: 2.5 MSPS (TURBO high), 2.0 MSPS (TURBO low) Low power dissipation 15.5 mW at 2.5 MSPS, with external reference 28 mW at 2.5 MSPS, with internal reference INL: ±0.25 LSB typical, ±1.0 LSB maximum SNR 84 dB, with on-chip reference 84.5 dB, with external reference 4.096 V internal reference: typical drift of ±10 ppm/°C Pseudo differential analog input voltage range 0 V to VREF with VREF up to 5.0 V Allows use of any input range No pipeline delay L.

📥 Download Datasheet

📁 Similar Datasheet

Part Number Description Manufacturer
AD7216N2L AC-DC / External Freestanding Adapter Emerson
AD7315 Low Quiescent Current Low Dropout CMOS Voltage Regulator Advanced Corporation Limited
AD7318 Low Quiescent Current Low Dropout CMOS Voltage Regulator Advanced Corporation Limited
AD7325 Low Quiescent Current Low Dropout CMOS Voltage Regulator Advanced Corporation Limited
AD7328 Low Quiescent Current Low Dropout CMOS Voltage Regulator Advanced Corporation Limited

Other Datasheets by Analog Devices

Part Number Description
AD7940 14-Bit ADC
AD7942 Pseudo Differential ADC
AD7943 +3.3 V/+5 V Multiplying 12-Bit DACs
AD7945 +3.3 V/+5 V Multiplying 12-Bit DACs
AD7946 PulSAR ADC

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
14-Bit, 2.5 MSPS, PulSAR 15.5 mW ADC in LFCSP AD7944 FEATURES 14-bit resolution with no missing codes Throughput: 2.5 MSPS (TURBO high), 2.0 MSPS (TURBO low) Low power dissipation 15.5 mW at 2.5 MSPS, with external reference 28 mW at 2.5 MSPS, with internal reference INL: ±0.25 LSB typical, ±1.0 LSB maximum SNR 84 dB, with on-chip reference 84.5 dB, with external reference 4.096 V internal reference: typical drift of ±10 ppm/°C Pseudo differential analog input voltage range 0 V to VREF with VREF up to 5.0 V Allows use of any input range No pipeline delay Logic interface: 1.8 V/2.5 V/2.7 V Serial interface: SPI-/QSPI-/MICROWIRE-/DSP-compatible Ability to daisy-chain multiple ADCs with busy indicator 20-lead, 4 mm × 4 mm LFCSP (QFN) APPLICATION DIAGRAM 5V 2.5V 1.8V TO 2.