AD9225 Datasheet | Analog Devices

FEATURES Monolithic 12-Bit, 25 MSPS ADC Low Power Dissipation: 280 m W Single 5 V Supply No Missing Codes Guaranteed Differential Nonlinearity Error: ؎0.4 LSB plete On-Chip Sample-and-Hold Amplifier and Voltage Reference Signal-to-Noise and Distortion Ratio: 71 d B Spurious-Free Dynamic Range: - 85 d B Out-of-Range Indicator Straight Binary Output Data 28-Lead SOIC 28-Lead SSOP patible with 3 V Logic plete 12-Bit, 25 MSPS Monolithic A/D Converter FUNCTIONAL BLOCK DIAGRAM VINA VINB CAPT CAPB VREF SENSE AVDD DRVDD MDAC1 GAIN = 16 5 ADC MDAC2 GAIN = 4 MDAC3 GAIN = 4 3 ADC ADC 3 33 DIGITAL CORRECTION LOGIC 12 OUTPUT BUFFERS ADC 4 MODE SELECT 1V AVSS DRVSS CML BIT 1 (MSB) BIT 12 (LSB) GENERAL DESCRIPTION The AD9225 is a monolithic, single-supply, 12-bit, 25 MSPS analog-to-digital converter with an on-chip, high performance sample-and-hold amplifier and voltage reference. The AD9225 uses a multistage differential pipelined architecture with output error correction logic to provide 12-bit accuracy at 25 MSPS data rates, and guarantees no missing codes over the full operating temperature range. The AD9225 bines a low cost, high speed CMOS process and a novel architecture to achieve the resolution and speed of existing bipolar implementations at a fraction of the power consumption and cost. The input of the AD9225 allows for easy interfacing to both imaging and munications systems. With the device’s truly differential input structure, the user can select a variety of input ranges and offsets, including single-ended applications. The dynamic performance is excellent. The sample-and-hold amplifier (SHA) is well suited for both multiplexed systems that switch full-scale voltage levels in successive channels and sampling single-channel inputs at frequencies up to and well beyond the Nyquist rate. The AD9225’s wideband input, bined with the power and cost savings over previously available monolithics, suits applications in...