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AD9262 - 30 MSPS to 160 MSPS Dual Continuous Time Sigma-Delta ADC

Description

The AD9262 is a dual channel, 16-bit analog-to-digital converter (ADC) based on a continuous time (CT) sigma-delta (Σ-Δ) architecture that

Features

  • SNR: 83 dB (85 dBFS) to 10 MHz input SFDR:.
  • 87 dBc to 10 MHz input Noise figure: 15 dB Input impedance: 1 kΩ Power: 600 mW 1.8 V analog supply operation 1.8 V to 3.3 V output supply Selectable bandwidth 2.5 MHz/5 MHz/10 MHz real 5 MHz/10 MHz/20 MHz complex Output data rate: 30 MSPS to 160 MSPS Integrated dc and quadrature correction Integrated decimation filters Integrated sample rate converter On-chip PLL clock multiplier On-chip voltage reference Offset binary, Gray code, or twos compl.

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Datasheet Details

Part number AD9262
Manufacturer Analog Devices
File Size 1.22 MB
Description 30 MSPS to 160 MSPS Dual Continuous Time Sigma-Delta ADC
Datasheet download datasheet AD9262 Datasheet
Additional preview pages of the AD9262 datasheet.

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Full PDF Text Transcription

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16-Bit, 2.5 MHz/5 MHz/10 MHz, 30 MSPS to 160 MSPS Dual Continuous Time Sigma-Delta ADC AD9262 FEATURES SNR: 83 dB (85 dBFS) to 10 MHz input SFDR: −87 dBc to 10 MHz input Noise figure: 15 dB Input impedance: 1 kΩ Power: 600 mW 1.8 V analog supply operation 1.8 V to 3.3 V output supply Selectable bandwidth 2.5 MHz/5 MHz/10 MHz real 5 MHz/10 MHz/20 MHz complex Output data rate: 30 MSPS to 160 MSPS Integrated dc and quadrature correction Integrated decimation filters Integrated sample rate converter On-chip PLL clock multiplier On-chip voltage reference Offset binary, Gray code, or twos complement data format Serial control interface (SPI) APPLICATIONS Baseband quadrature receivers: CDMA2000, W-CDMA, multicarrier GSM/EDGE, 802.
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