AD9272 Datasheet | Analog Devices

Features 8 channels of LNA, VGA, AAF, and ADC Low noise preamplifier (LNA) Input-referred noise voltage = 0.75 n V/√Hz (gain = 21.3 d B) @ 5 MHz typical SPI-programmable gain = 15.6 d B/17.9 d B/21.3 d B Single-ended input; VIN maximum = 733 m V p-p/ 550 m V p-p/367 m V p-p Dual-mode active input impedance matching Bandwidth (BW) > 100 MHz Full-scale (FS) output = 4.4 V p-p differential Variable gain amplifier (VGA) Attenuator range = - 42 d B to 0 d B SPI-programmable PGA gain = 21 d B/24 d B/27 d B/30 d B Linear-in-d B gain control Antialiasing filter (AAF) Programmable 2nd-order low-pass filter (LPF) from 8 MHz to 18 MHz Programmable high-pass filter (HPF) Analog-to-digital converter (ADC) 12 bits at 10 MSPS to 80 MSPS SNR = 70 d B SFDR = 75 d B Serial LVDS (ANSI-644, IEEE 1596.3 reduced range link) Data and frame clock outputs Includes an 8 × 8 differential crosspoint switch to support continuous wave (CW) Doppler Low power, 195 m W per channel at 12 bits/40 MSPS (TGC) 120 m W per channel in CW Doppler Flexible power-down modes Overload recovery in <10 ns Fast recovery from low power standby mode, <2 μs 100-lead TQFP APPLICATIONS Medical imaging/ultrasound Automotive radar GENERAL DESCRIPTION The AD9272 is designed for low cost, low power, small size, and ease of use. It contains eight channels of a low noise preamplifier (LNA) with a variable gain amplifier (VGA), an antialiasing filter (AAF), and a 12-bit, 10 MSPS to 80 MSPS analog-todigital converter (ADC). Each channel Features a variable gain range of 42 d B, a fully differential signal path, an active input preamplifier termination, a maximum gain of up to 52 d B, and an ADC with a conversion rate of up to 80 MSPS. The channel is optimized for dynamic performance and low power in applications where a small package size is critical. Octal LNA/VGA/AAF/ADC and Crosspoint Switch FUNCTIONAL BLOCK DIAGRAM AVDD1 AVDD2 PDWN STBY DRVDD LOSW-A LO-A LI-A LG-A LOSW-B LO-B LI-B LG-B LNA VGA LOSW-C LO-C LI-C...