AD9467 Datasheet | Analog Devices

FEATURES - 75.5 d BFS SNR to 210 MHz at 250 MSPS - 90 d BFS SFDR to 300 MHz at 250 MSPS - SFDR at 170 MHz at 250 MSPS - 92 d BFS at - 1 d BFS - 100 d BFS at - 2 d BFS - 60 fs rms jitter - Excellent linearity at 250 MSPS - DNL = ±0.5 LSB typical - INL = ±3.5 LSB typical - 2 V p-p to 2.5 V p-p (default) differential full-scale input (programmable) - Integrated input buffer - External reference support option - Clock duty cycle stabilizer - Output clock available - Serial port control - Built-in selectable digital test pattern generation - Selectable output data format - LVDS outputs (ANSI-644 patible) - 1.8 V and 3.3 V supply operation APPLICATIONS - Multicarrier, multimode cellular receivers - Antenna array positioning - Power amplifier linearization - Broadband wireless - Radar - Infrared imaging - munications instrumentation GENERAL DESCRIPTION The AD9467 is a 16-bit, monolithic, IF sampling analog-to-digital converter (ADC). It is optimized for high performance over wide bandwidths and ease of use. The product operates at a 250 MSPS conversion rate and is designed for wireless receivers, instrumentation, and test equipment that require a high dynamic range. The ADC requires 1.8 V and 3.3 V power supplies and a low voltage differential input clock for full performance operation. No external reference or driver ponents are required for many applications. Data outputs are LVDS patible (ANSI-644 patible) and include the means to reduce the overall current needed for short trace distances. A data clock output (DCO) for capturing data on the output is provided for signaling a new output bit. The internal power-down feature supported via the SPI typically consumes less than 5 m W when disabled. Optional features allow users to implement various selectable operating conditions, including input range, data format select, and output data test patterns. The AD9467 is available in a Pb-free, 72-lead, LFCSP specified over the - 40°C to +85°C industrial temperature range. PRODUCT...