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AD9508 - 1.65 GHz Clock Fanout Buffer

Key Features

  • 1.65 GHz differential clock inputs/outputs 10-bit programmable dividers, 1 to 1024, all integers Up to 4 differential outputs or 8 CMOS outputs Pin strapping capability for hardwired programming at power-up.

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The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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Data Sheet 1.65 GHz Clock Fanout Buffer with Output Dividers and Delay Adjust AD9508 FEATURES 1.65 GHz differential clock inputs/outputs 10-bit programmable dividers, 1 to 1024, all integers Up to 4 differential outputs or 8 CMOS outputs Pin strapping capability for hardwired programming at power-up <115 fs rms broadband random jitter (see Figure 25) Additive output jitter: 41 fs rms typical (12 kHz to 20 MHz) Excellent output-to-output isolation Automatic synchronization of all outputs Single 2.5 V/3.