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AD9510 - 1.2 GHz Clock Distribution IC

General Description

The AD9510 provides a multi-output clock distribution function along with an on-chip phase-locked loop (PLL) core.

The design emphasizes low jitter and phase noise to maximize data converter performance.

Key Features

  • Low phase noise phase-locked loop core Reference input frequencies to 250 MHz Programmable dual modulus prescaler Programmable charge pump (CP) current Separate CP supply (VCPS) extends tuning range Two 1.6 GHz, differential clock inputs 8 programmable dividers, 1 to 32, all integers Phase select for output-to-output coarse delay adjust 4 independent 1.2 GHz LVPECL outputs Additive output jitter of 225 fs rms 4 independent 800 MHz low voltage differential signaling (LVDS) or 250 MHz complementar.

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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Data Sheet 1.2 GHz Clock Distribution IC, PLL Core, Dividers, Delay Adjust, Eight Outputs AD9510 FEATURES Low phase noise phase-locked loop core Reference input frequencies to 250 MHz Programmable dual modulus prescaler Programmable charge pump (CP) current Separate CP supply (VCPS) extends tuning range Two 1.6 GHz, differential clock inputs 8 programmable dividers, 1 to 32, all integers Phase select for output-to-output coarse delay adjust 4 independent 1.