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AD9762 - 12-Bit/ 125 MSPS TxDAC D/A Converter

General Description

0.1␮F 12-Bit, 125 MSPS TxDAC® D/A Converter AD9762 FUNCTIONAL BLOCK DIAGRAM +5V 0.1␮F REFLO +1.20V REF 50pF REFIO FS ADJ RSET +5V DVDD DCOM CLOCK CLOCK SLEEP SEGMENTED SWITCHES COMP1 AVDD ACOM AD9762 CURRENT SOURCE ARRAY COMP2 0.1␮F IOUTA LSB SWITCHES IOUTB LATCHES DIGITAL DATA INPUTS

Key Features

  • Member of Pin-Compatible TxDAC Product Family 125 MSPS Update Rate 12-Bit Resolution Excellent Spurious Free Dynamic Range Performance SFDR to Nyquist @ 5 MHz Output: 70 dBc Differential Current Outputs: 2 mA to 20 mA Power Dissipation: 175 mW @ 5 V to 45 mW @ 3 V Power-Down Mode: 25 mW @ 5 V On-Chip 1.20 V Reference Single +5 V or +3 V Supply Operation Package: 28-Lead SOIC and TSSOP Edge-Triggered Latches.

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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a FEATURES Member of Pin-Compatible TxDAC Product Family 125 MSPS Update Rate 12-Bit Resolution Excellent Spurious Free Dynamic Range Performance SFDR to Nyquist @ 5 MHz Output: 70 dBc Differential Current Outputs: 2 mA to 20 mA Power Dissipation: 175 mW @ 5 V to 45 mW @ 3 V Power-Down Mode: 25 mW @ 5 V On-Chip 1.20 V Reference Single +5 V or +3 V Supply Operation Package: 28-Lead SOIC and TSSOP Edge-Triggered Latches APPLICATIONS Communication Transmit Channel: Basestations (Single/Multichannel Applications) ADSL/HFC Modems Direct Digital Synthesis (DDS) Instrumentation PRODUCT DESCRIPTION 0.1␮F 12-Bit, 125 MSPS TxDAC® D/A Converter AD9762* FUNCTIONAL BLOCK DIAGRAM +5V 0.1␮F REFLO +1.