AD9850 Datasheet | Analog Devices

FEATURES 125 MHz Clock Rate On-Chip High Performance DAC and High Speed parator DAC SFDR > 50 d B @ 40 MHz AOUT 32-Bit Frequency Tuning Word Simplified Control Interface: Parallel Byte or Serial Loading Format Phase Modulation Capability 3.3 V or 5 V Single-Supply Operation Low Power: 380 m W @ 125 MHz (5 V) Low Power: 155 m W @ 110 MHz (3.3 V) Power-Down Function Ultrasmall 28-Lead SSOP Packaging APPLICATIONS Frequency/Phase- Agile Sine Wave Synthesis Clock Recovery and Locking Circuitry for Digital munications Digitally Controlled ADC Encode Generator Agile Local Oscillator Applications CMOS, 125 MHz plete DDS Synthesizer FUNCTIONAL BLOCK DIAGRAM +VS GND REF CLOCK IN MASTER RESET FREQUENCY UPDATE/ DATA REGISTER RESET WORD LOAD CLOCK HIGH SPEED DDS 32-BIT TUNING WORD PHASE AND CONTROL WORDS FREQUENCY/PHASE DATA REGISTER DATA INPUT REGISTER SERIAL LOAD PARALLEL LOAD 10-BIT DAC DAC RSET ANALOG OUT ANALOG IN PARATOR CLOCK OUT CLOCK OUT 1-BIT 8-BITS 40 LOADS 5 LOADS FREQUENCY, PHASE, AND CONTROL DATA INPUT GENERAL DESCRIPTION The AD9850 is a highly integrated device that uses advanced DDS technology coupled with an internal high speed, high performance D/A converter and parator to form a plete, digitally programmable frequency synthesizer and clock generator function. When referenced to an accurate clock source, the AD9850 generates a spectrally pure, frequency/phase programmable, analog output sine wave. This sine wave can be used directly as a frequency source, or it can be converted to a square wave for agile-clock generator applications. The AD9850’s innovative high speed DDS core provides a 32-bit frequency tuning word, which results in an output tuning resolution of 0.0291 Hz for a 125 MHz reference clock input. The AD9850’s circuit architecture allows the generation of output frequencies of up to one-half the reference clock frequency (or 62.5 MHz), and the output frequency can be digitally changed (asynchronously) at a rate of...