AD9883 Datasheet | Analog Devices

FEATURES 110 MSPS Maximum Conversion Rate 300 MHz Analog Bandwidth 0.5 V to 1.0 V Analog Input Range 500 ps p-p PLL Clock Jitter at 110 MSPS 3.3 V Power Supply Full Sync Processing Sync Detect for ”Hot Plugging” Midscale Clamping Power-Down Mode Low Power: 500 m W Typical posite Sync Applications Require an External Coast APPLICATIONS RGB Graphics Processing LCD Monitors and Projectors Plasma Display Panels Scan Converters Microdisplays Digital TV 110 MSPS Analog Interface for Flat Panel Displays AD9883 FUNCTIONAL BLOCK DIAGRAM RAIN CLAMP A/D 8 ROUTA GAIN CLAMP A/D GOUTA BAIN CLAMP A/D BOUTA MIDSCV HSYNC COAST CLAMP FILT SYNC PROCESSING AND CLOCK GENERATION DTACK HSOUT VSOUT SOGOUT REF REF BYPASS SCL SDA A0 SERIAL REGISTER AND POWER MANAGEMENT GENERAL DESCRIPTION The AD9883 is a plete 8-bit, 110 MSPS monolithic analog interface optimized for capturing RGB graphics signals from personal puters and workstations. Its 110 MSPS encode rate capability and full-power analog bandwidth of 300 MHz supports resolutions up to SXGA (1280 × 1024 at 60 Hz). The AD9883 includes a 110 MHz triple ADC with internal 1.25 V reference, a PLL, and programmable gain, offset, and clamp control. The user provides only a 3.3 V power supply, analog input, and HSYNC and COAST signals. Three-state CMOS outputs may be powered from 2.5 V to 3.3 V. The AD9883’s on-chip PLL generates a pixel clock from HSYNC and COAST inputs. Pixel clock output frequencies range from 12 MHz to 110 MHz. PLL clock jitter is 500 ps p-p typical at 110 MSPS. When the COAST signal is presented, the PLL maintains its output frequency in the absence of HSYNC. A sampling phase adjustment is provided. Data, HSYNC and Clock output phase relationships are maintained. The AD9883 also offers full sync processing for posite sync and sync-ongreen applications. A clamp signal is generated internally or may be provided by the user through the CLAMP input pin. This interface is fully programmable via a...