AD9978 Datasheet | Analog Devices

FEATURES Dual AFE channels 1.8 V analog and digital core supply voltage Serial data output with reduced range LVDS outputs Differential analog inputs CDS or SHA configuration (CDS bypass) with - 3 d B, 0 d B, +3 d B, and +6 d B gain 6 d B to 42 d B, 10-bit variable gain amplifier (VGA) 14-bit, 65 MHz analog-to-digital converter (ADC) Black level clamp with variable level control .. Precision Timing core with 240 ps resolution @ 65 MHz GENERAL DESCRIPTION The AD9978 is a highly integrated, dual-channel, CCD signal processor for high speed digital video camera applications. Each channel is specified at pixel rates of up to 65 MHz and consists of a plete analog front end with ADC conversion. The Precision Timing™ core allows adjustment of the correlated double sampler (CDS) and sample-and-hold amplifier (SHA) clocks with 240 ps resolution at 65 MHz operation. The AD9978 also contains a reduced range, low voltage differential signaling (LVDS) interface for the dual-channel data outputs. Each analog front end includes black level clamping, a CDS, a VGA, and a 65 MHz, 14-bit ADC. Operation is programmed using a 3-wire serial interface. Packaged in a space-saving, 6 mm × 6 mm, 40-lead LFCSP, the AD9978 is specified over an operating temperature range of - 25°C to +85°C. APPLICATIONS Digital video cameras Digital still cameras Digital copiers Multifunction printers High speed industrial cameras FUNCTIONAL BLOCK DIAGRAM VREF INP_A INM_A 6d B TO 42d B CDS/ SHA VGA ADC DOUT0P DOUT0N DOUT1P DOUT1N TCLKP TCLKN DOUT2P DOUT2N DOUT3P DOUT3N - 3d B, 0d B, +3d B, +6d B - 3d B, 0d B, +3d B, +6d B 6d B TO 42d B CDS/ VGA SHA INTERNAL CLOCKS CLAMP CLAMP ADC LVDS SERIALIZER INP_B INM_B CLK_OUT PRECISION TIMING CORE SYNC GENERATOR INTERNAL REGISTERS 06810-001 SDATA Figure 1. For more information about the AD9978, contact Analog Devices via email at afe.ccd@analog.. Rev. Sp A Information furnished by Analog Devices is believed to be accurate and reliable. However, no...