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Data Sheet ADAQ4003
18-Bit, 2 MSPS, µModule Data Acquisition Solution
FEATURES
FUNCTIONAL BLOCK DIAGRAM
► Improved design journey ► Fully differential ADC driver with selectable input range ► Input ranges with 5 V VREF: ±10 V, ±5 V, or ±2.5 V ► Essential passive components included ► ±0.005% iPassives matched resistor array ► Wide input common-mode voltage range ► High common-mode rejection ratio ► Single-ended to differential conversion
► Increased signal chain density ► Small, 7 mm × 7 mm, 0.80 mm pitch, 49-ball CSP_BGA ► 4× footprint reduction vs. discrete solution ► On-board reference buffer with VCM generation
► High performance ► Throughput: 2 MSPS, no pipeline delay ► Guaranteed 18-bit no missing codes ► INL: ±3 ppm typical, ±8 ppm guaranteed ► SINAD: 99 dB typical (G = 0.