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ADCMP562 - (ADCMP561 / ADCMP562) Dual High Speed PECL Comparators

This page provides the datasheet information for the ADCMP562, a member of the ADCMP561 (ADCMP561 / ADCMP562) Dual High Speed PECL Comparators family.

Datasheet Summary

Description

The ADCMP561/ADCMP562 are high speed comparators fabricated on Analog Devices’ proprietary XFCB process.

The devices feature a 700 ps propagation delay with less than 75 ps overdrive dispersion.

Features

  • Differential PECL compatible outputs 700 ps propagation delay input to output 75 ps propagation delay dispersion Input common-mode range:.
  • 2.0 V to +3.0 V Robust input protection Differential latch control Internal latch pull-up resistors Power supply rejection greater than 85 dB 700 ps minimum pulse width 1.5 GHz equivalent input rise time bandwidth Typical output rise/fall time of 500 ps ESD protection > 4kV HBM, >200V MM Programmable hysteresis.

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Datasheet preview – ADCMP562

Datasheet Details

Part number ADCMP562
Manufacturer Analog Devices
File Size 335.06 KB
Description (ADCMP561 / ADCMP562) Dual High Speed PECL Comparators
Datasheet download datasheet ADCMP562 Datasheet
Additional preview pages of the ADCMP562 datasheet.

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Full PDF Text Transcription

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Dual High Speed PECL Comparators ADCMP561/ADCMP562 FEATURES Differential PECL compatible outputs 700 ps propagation delay input to output 75 ps propagation delay dispersion Input common-mode range: –2.0 V to +3.0 V Robust input protection Differential latch control Internal latch pull-up resistors Power supply rejection greater than 85 dB 700 ps minimum pulse width 1.5 GHz equivalent input rise time bandwidth Typical output rise/fall time of 500 ps ESD protection > 4kV HBM, >200V MM Programmable hysteresis FUNCTIONAL BLOCK DIAGRAM HYS* NONINVERTING INPUT Q OUTPUT ADCMP561/ ADCMP562 INVERTING INPUT Q OUTPUT *ADCMP562 ONLY Figure 1.
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