Datasheet4U Logo Datasheet4U.com

ADF4193 - Fast Settling PLL Frequency Synthesizer

Datasheet Summary

Description

The ADF4193 frequency synthesizer can be used to implement local oscillators in the upconversion and downconversion sections of wireless receivers and transmitters.

Its architecture is specifically designed to meet the GSM/EDGE lock time requirements for base stations.

Features

  • New, fast settling, fractional-N PLL architecture Single PLL replaces ping-pong synthesizers Frequency hop across GSM band in 5 µs with phase settled by 20 µs 0.5° rms phase error at 2 GHz RF output Digitally programmable output phase RF input range up to 3.5 GHz 3-wire serial interface On-chip, low noise differential amplifier Phase noise figure of merit:.
  • 216 dBc/Hz Loop filter design possible using ADIsimPLL™ Qualified for automotive.

📥 Download Datasheet

Datasheet preview – ADF4193

Datasheet Details

Part number ADF4193
Manufacturer Analog Devices
File Size 766.24 KB
Description Fast Settling PLL Frequency Synthesizer
Datasheet download datasheet ADF4193 Datasheet
Additional preview pages of the ADF4193 datasheet.

📁 Similar Datasheet

Other Datasheets by Analog Devices
  • ADF4196 - 6 GHz PLL Frequency Synthesizer
  • ADF41020 - 18 GHz Microwave PLL Synthesizer
  • ADF4106 - PLL Frequency Synthesizer
  • ADF4107 - PLL Frequency Synthesizer
  • ADF4108 - PLL Frequency Synthesizer
  • ADF4110 - RF PLL Frequency Synthesizers
  • ADF4111 - RF PLL Frequency Synthesizers
  • ADF4112 - RF PLL Frequency Synthesizers

Full PDF Text Transcription

Click to expand full text
Data Sheet Low Phase Noise, Fast Settling PLL Frequency Synthesizer ADF4193 FEATURES New, fast settling, fractional-N PLL architecture Single PLL replaces ping-pong synthesizers Frequency hop across GSM band in 5 µs with phase settled by 20 µs 0.5° rms phase error at 2 GHz RF output Digitally programmable output phase RF input range up to 3.
Published: |