ADG2108 Datasheet | Analog Devices

FEATURES I2C-patible interface 3.4 MHz high speed I2C option 32-lead LFCSP_VQ (5 mm × 5 mm) Double-buffered input logic Simultaneous update of multiple switches Up to 300 MHz bandwidth Fully specified at dual ±5 V/single +12 V operation On resistance 35 Ω maximum Low quiescent current < 20 μA GENERAL DESCRIPTION The ADG2108 is an analog cross point switch with an array size of 8 × 10. The switch array is arranged so that there are eight columns by 10 rows, for a total of 80 switch channels. The array is bidirectional, and the rows and columns can be configured as either inputs or outputs. Each of the 80 switches can be addressed and configured through the I2Cpatible interface. Standard, full speed, and high speed (3.4 MHz) I2C interfaces are supported. Any simultaneous switch bination is allowed. An additional feature of the ADG2108 is that switches can be updated simultaneously, using the LDSW mand. In addition, a RESET option allows all of the switch channels to be reset/off. At power on, all switches are in the off condition. The device is packaged in a 32-lead, 5 mm × 5 mm LFCSP_VQ. APPLICATIONS AV switching in TV Automotive infotainment AV receivers CCTV Ultrasound applications KVM switching Tele applications Test equipment/instrumentation PBX systems FUNCTIONAL BLOCK DIAGRAM VDD VSS VL SCL SDA INPUT REGISTER AND 7 TO 80 DECODER 1 LATCHES 80 LDSW 1 8 × 10 SWITCH ARRAY 80 LDSW X0 TO X9 (I/O) A2 A1 A0 Y0 TO Y7 (I/O) Figure 1. Rev. 0 Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box...