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Data Sheet ADP150
Ultralow Noise, 150 mA, CMOS Linear Regulator
FEATURES
► Ultralow noise: 9 µV rms, independent of VOUT ► No additional noise bypass capacitor required ► Stable with 1 µF ceramic input and output capacitors ► Maximum output current: 150 mA ► Input voltage range: 2.2 V to 5.5 V ► Low quiescent current
► IGND = 10 µA with zero load ► Low shutdown current: <1 µA ► Low dropout voltage: 105 mV at 150 mA load ► Initial output voltage accuracy: ±1% ► Up to 14 fixed output voltage options: 1.8 V to 3.3 V ► PSRR performance of 70 dB at 10 kHz ► Current limit and thermal overload protection ► Logic-controlled enable ► 5-lead TSOT package ► 4-ball, 0.8 mm × 0.8 mm, 0.