ADP3193A Datasheet | Analog Devices

FEATURES Selectable 2- or 3-phase operation at up to 1 MHz per phase ±7.7 m V worst-case differential sensing error over temperature Logic-level PWM outputs for interface to external high power drivers Fast enhanced PWM (FEPWM) flex mode for excellent load transient performance Active current balancing between all output phases Built-in power-good/crowbar blanking supports on-the-fly VID code changes Digitally programmable 0.5 V to 1.6 V output supports both VR10.x and VR11 specifications Programmable short-circuit protection with programmable latch-off delay FUNCTIONAL BLOCK DIAGRAM RT RAMPADJ 9 10 SHUNT REGULATOR UVLO SHUTDOWN GND 14 850m V EN OSCILLATOR + - 15 OD - + DAC +150m V CSREF DAC - 350m V + - - + SET EN RESET 22 PWM1 21 PWM2 CURRENT BALANCING CIRCUIT - + RESET 2-/3-PHASE DRIVER LOGIC 20 PWM3 - + RESET CURRENT LIMIT 19 SW1 18 SW2 17 SW3 PWRGD DELAY CROWBAR APPLICATIONS Desktop PC power supplies for Next generation Intel® processors VRM modules 13 CSP ILIMIT 8 DELAY CURRENT MEASUREMENT AND LIMIT + - 11 CSREF 12 CSSUM IREF 16 P 5...