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ADRF5534 - Receiver Front-End

Datasheet Summary

Description

The ADRF5534 is an integrated RF, front-end multichip module designed for time division duplex (TDD) applications.

The device operates from 3.1 GHz to 4.2 GHz.

The ADRF5534 is configured with an LNA and a high-power, silicon, SPDT switch.

Features

  • Integrated RF front end.
  • LNA and high-power silicon SPDT switch.
  • On-chip bias and matching.
  • Single-supply operation.
  • Gain: 35.5 dB typical at 3.6 GHz.
  • Gain flatness: 1.5 dB at 25°C across 400 MHz bandwidth.
  • Low noise figure: 1.3 dB typical at 3.6 GHz.
  • Low insertion loss: 0.8 dB typical at 3.6 GHz.
  • High-power handling at TCASE = 105°C.
  • Full lifetime.
  • LTE average power (8 dB PAR): 37 dBm.
  • Single event (.

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Datasheet preview – ADRF5534

Datasheet Details

Part number ADRF5534
Manufacturer Analog Devices
File Size 680.91 KB
Description Receiver Front-End
Datasheet download datasheet ADRF5534 Datasheet
Additional preview pages of the ADRF5534 datasheet.

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Full PDF Text Transcription

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FEATURES ► Integrated RF front end ► LNA and high-power silicon SPDT switch ► On-chip bias and matching ► Single-supply operation ► Gain: 35.5 dB typical at 3.6 GHz ► Gain flatness: 1.5 dB at 25°C across 400 MHz bandwidth ► Low noise figure: 1.3 dB typical at 3.6 GHz ► Low insertion loss: 0.8 dB typical at 3.
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