ADSP-BF561SBB500 Overview
................................................. 3 Portable Low-Power Architecture ............................. 3 Blackfin Processor Core ..........................................
ADSP-BF561SBB500 Key Features
- 1.2V core VDD with On-Chip Voltage Regulation 3.3V and 2.5V Tolerant I/O 256-Ball Mini BGA and 297-Ball PBGA Package Opt
- 3 Portable Low-Power Architecture
- 3 Blackfin Processor Core
- 3 Memory Architecture
- 4 Internal (On-chip) Memory
- 4 External (Off-Chip) Memory
- 5 I/O Memory Space
- 6 Booting
- 6 Event Handling
- 6 Core Event Controller (CEC)