ADSP-BF592 Datasheet | Analog Devices

Features Up to 400 MHz high performance Blackfin processor Two 16-bit MACs, two 40-bit ALUs, four 8-bit video ALUs, 40-bit shifter RISC-like register and instruction model for ease of programming and piler-friendly support Advanced debug, trace, and performance monitoring Accepts a wide range of supply voltages for internal and I/O operations, see Operating Conditions Off-chip voltage regulator interface 64-lead (9 mm × 9 mm body and 0.85 mm package height) LFCSP package MEMORY 68K bytes of core-accessible memory (See Table 1 for L1 and L3 memory size details) 64K byte L1 instruction ROM Flexible booting options from internal L1 ROM and SPI memory or from host devices including SPI,...