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ADSP-BF592 - Blackfin Embedded Processor

Description

3 Portable Low Power Architecture 3 System Integration 3 Blackfin Processor Core 3 Memory Architecture 5 Event Handling 5 DMA Controllers 6 Processor Peripherals 6 Dynamic Power Management 8 Voltage Regulation 9 Clock Signals 9 Booting Modes 11 Instruction Set Description 12 REVISION HI

Features

  • Up to 400 MHz high performance Blackfin processor Two 16-bit MACs, two 40-bit ALUs, four 8-bit video ALUs, 40-bit shifter RISC-like register and instruction model for ease of programming and compiler-friendly support Advanced debug, trace, and performance monitoring Accepts a wide range of supply voltages for internal and I/O operations, see Operating Conditions Off-chip voltage regulator interface 64-lead (9 mm × 9 mm body and 0.85 mm package height) LFCSP package MEMORY 68K bytes of core-acces.

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The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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FEATURES Up to 400 MHz high performance Blackfin processor Two 16-bit MACs, two 40-bit ALUs, four 8-bit video ALUs, 40-bit shifter RISC-like register and instruction model for ease of programming and compiler-friendly support Advanced debug, trace, and performance monitoring Accepts a wide range of supply voltages for internal and I/O operations, see Operating Conditions Off-chip voltage regulator interface 64-lead (9 mm × 9 mm body and 0.
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