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ADSP2196 - DSP Microcomputer

This page provides the datasheet information for the ADSP2196, a member of the ADSP-2196 DSP Microcomputer family.

Description

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4 DSP Peripherals Architecture 5 Memory Architecture

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Features

  • 6.25 ns Instruction Cycle Time (Internal), for up to 160 MIPS Sustained Performance ADSP-218x Family Code Compatible with the Same Easy -to-Use Algebraic Syntax Single-Cycle Instruction Execution Up to 16M words of Addressable Memory Space with 24 Bits of Addressing Width Dual Purpose Program Memory for Both Instruction and Data Storage Fully Transparent Instruction Cache Allows Dual Operand Fetches in Every Instruction Cycle Unified Memory Space Permits Flexible Address Generation, Using Two In.

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Datasheet preview – ADSP2196

Datasheet Details

Part number ADSP2196
Manufacturer Analog Devices
File Size 1.97 MB
Description DSP Microcomputer
Datasheet download datasheet ADSP2196 Datasheet
Additional preview pages of the ADSP2196 datasheet.

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Full PDF Text Transcription

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35(/,0,1$5< 7(&+1,&$/ '$7$ a U 4 t w w m o .c e e Preliminary Technical Data h S a at .D w ADSP-219x DSP CORE FEATURES 6.
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