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ADSP21992 - Mixed Signal DSP Controller

This page provides the datasheet information for the ADSP21992, a member of the ADSP-21992 Mixed Signal DSP Controller family.

Description

2 DSP Core Architecture

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Features

  • ADSP-219x, 16-Bit, Fixed Point DSP Core with up to 160 MIPS Sustained Performance 48K Words of On-Chip RAM, Configured as 32K Words On-Chip 24-Bit Program RAM and 16K Words On-Chip 16-Bit Data RAM External Memory Interface Dedicated Memory DMA Controller for Data/Instruction Transfer between Internal/External Memory Programmable PLL and Flexible Clock Generation Circuitry Enables Full-Speed Operation from LowSpeed Input Clocks IEEE JTAG Standard 1149.1 Test Access Port Supports On-Chip Emulation.

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Datasheet preview – ADSP21992

Datasheet Details

Part number ADSP21992
Manufacturer Analog Devices
File Size 2.31 MB
Description Mixed Signal DSP Controller
Datasheet download datasheet ADSP21992 Datasheet
Additional preview pages of the ADSP21992 datasheet.

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Full PDF Text Transcription

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m o .c U 4 t e e h S a at .D w w w a Mixed Signal DSP Controller With CAN ADSP-21992 Three Phase 16-Bit Center Based PWM Generation Unit with 12.5 ns Resolution at 160 MHz Core Clock (CCLK) Rate Dedicated 32-Bit Encoder Interface Unit with Companion Encoder Event Timer Dual 16-Bit Auxiliary PWM Outputs 16 General-Purpose Flag I/O Pins Three Programmable 32-Bit Interval Timers SPI Communications Port with Master or Slave Operation Synchronous Serial Communications Port (SPORT) Capable of Software UART Emulation Controller Area Network (CAN) Module Fully Compliant with V2.
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