HMC674LC3C Datasheet | Analog Devices

FEATURES Equivalent input bandwidth: 9.3 GHz typical Propagation delay: 85 ps typical Overdrive and slew rate dispersion: 10 ps typical Input signal minimum pulse width: 60 ps typical Resistor programmable hysteresis Differential latch control Power dissipation: 140 m W typical 16-terminal, 3 mm × 3 mm, ceramic leadless chip carrier (LCC) 16-lead lead frame chip scale package (LFCSP) APPLICATIONS Automatic test equipment (ATE) applications High speed instrumentation Digital receiver systems Pulse spectroscopy High speed trigger circuits Clock and data restoration GENERAL DESCRIPTION The HMC674LC3C/HMC674LP3E are silicon germanium (Si Ge), monolithic, ultrafast parators that feature reduced swing positive emitter-coupled logic (RSPECL) output drivers and latch inputs. These parators support 10 Gbps operation and provide 85 ps propagation delay and an input signal minimum pulse width of 60 ps with 0.2 ps rms of random jitter (RJ). Overdrive and slew rate dispersion is typically 10 ps, making the HMC674LC3C/HMC674LP3E ideal for a wide range of 9.3 GHz Latched parator with RSPECL Output Stage HMC674LC3C/HMC674LP3E FUNCTIONAL BLOCK DIAGRAM HMC674LC3C/HMC674LP3E 16 VCCI 15 RTN 14 HYS 13 VEE VTP 1 INP 2 50Ω INN 3 50Ω VTN 4 12 VCCO 11 Q 10 Q 9 VCCO VCCI 5 LE 6 LE 7 NIC 8 14861-001 PACKAGE BASE Figure 1. HMC674LC3C/HMC674LP3E Functional Block Diagram applications from ATE to broadband munications. The RSPECL output stages directly drive 400 m V into a 50 Ω resistor terminated to VTT = (VCCO - 2.0 V), where VTT is the PECL termination voltage (see Figure 16). The HMC674LC3C/ HMC674LP3E feature a high speed latch and programmable hysteresis. These devices can operate in either latch mode or as a tracking parator. Rev. K Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that...