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HMC7043 - 14-Output Fanout Buffer

General Description

The HMC7043 is a high performance clock buffer for the distribution of ultralow phase noise references for high speed data converters with either parallel or serial (JESD204B type) interfaces.

Key Features

  • JEDEC JESD204B support Low additive jitter:.

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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Data Sheet High Performance, 3.2 GHz, 14-Output Fanout Buffer HMC7043 FEATURES JEDEC JESD204B support Low additive jitter: <15 fs rms at 2457.6 MHz (12 kHz to 20 MHz) Very low noise floor: −155.2 dBc/Hz at 983.04 MHz Up to 14 LVDS, LVPECL, or CML type device clocks (DCLKs) Maximum CLKOUTx/CLKOUTx and SCLKOUTx/SCLKOUTx frequency of 3200 MHz JESD204B-compatible system reference (SYSREF) pulses 25 ps analog and ½ clock input cycle digital delay independently programmable on each of 14 clock output channels SPI-programmable adjustable noise floor vs.