Analog Devices HMC905LP3E
The HMC905LP3E is ideal for: • LO Generation with Low Noise Floor • Software Defined Radios • Clock Generators • Fast Switching Synthesizers • Military Applications • Test Equipment • Sensors Functional Diagram Features Low Noise Floor: -164 dBc/Hz at 10 MHz Offset for N = 4 Programmable Frequency Divider, N = 1, 2, 3 or 4 400 MHz to 6 GHz Input Frequency Range Up to +6 dBm Output Power Sleep Mode: Consumes| Part No. | HMC905LP3E |
|---|---|
| Datasheet | HMC905LP3E Download |
| Manufacturer |  Analog Devices |
| Description | 6 GHz LOW NOISE PROGRAMMABLE DIVIDER |
| Buy | Stock & Price |
APPLICATIONS
<1 µA 16 Lead 3X3 mm SMT Package: 9mm2GENERAL DESCRIPTION
The HMC905LP3E is a SiGe BiCMOS low noise programmable frequency divider in a 3x3 mm leadless surface mount package. The circuit can be programmed to divide from N = 1 to N = 4 in the 400 MHz to 6 GHz input frequency range. The high level output power (up to 6 dBm single ended) with a very low SSB phase noise and 50% duty cycle makes this device ideal for low noise clock g
