SMP08 Datasheet | Analog Devices

FEATURES Internal Hold Capacitors Low Droop Rate TTL/CMOS patible Logic Inputs Single or Dual Supply Operation Break-Before-Make Channel Addressing patible With CD4051 Pinout Low Cost APPLICATIONS Multiple Path Timing Deskew for ATE Memory Programmers Mass Flow/Process Control Systems Multichannel Data Acquisition Systems Robotics and Control Systems Medical and Analytical Instrumentation Event Analysis Stage Lighting Control INPUT 3 Octal Sample-and-Hold with Multiplexed Input SMP08- FUNCTIONAL BLOCK DIAGRAM (LSB) A 11 B 10 (MSB) C 9 INH 6 8 DGND 1 OF 8 DECODER 16 VDD SW 13 CH0OUT 14 CH1OUT 15 CH2OUT 12 CH3OUT CH4OUT CH5OUT CH6OUT GENERAL DESCRIPTION The SMP08 is a monolithic octal sample-and-hold; it has eight internal buffer amplifiers, input multiplexer, and internal hold capacitors. It is manufactured in an advanced oxide isolated CMOS technology to obtain high accuracy, low droop rate, and fast acquisition time. The SMP08 has a typical linearity error of only 0.01% and can accurately acquire a 10-bit input signal to ± 1/2 LSB in less than 7 microseconds. The SMP08’s output swing includes the negative supply in both single and dual supply operation. The SMP08 was specifically designed for systems that use a calibration cycle to adjust a multiple of system parameters. The low cost and high level of integration make the SMP08 ideal for calibration requirements that have previously required an ASIC, or high cost multiple D/A converters. - Protected by U.S. Patent No. 4,739,281. SW HOLD CAPS (INTERNAL) 4 CH7OUT 7 VSS The SMP08 is also ideally suited for a wide variety of sampleand-hold applications including amplifier offset or VCA gain adjustments. One or more SMP08s can be used with single or multiple DACs to provide multiple set points within a system. The SMP08 offers significant cost and size reduction over discrete designs. It is available in a 16-pin plastic DIP, or surfacemount SOIC package. REV....