AT5C1008 Description
The AT5C1008 SRAM employs high-speed, low power CMOS designs using a four-transistor memory cell, and are fabricated using double-layer metal, double-layer polysilicon technology. For design flexibility in high-speed memory applications, this device offers dual chip enables (CE1, CE2) and output enable (OE). These control pins can place the outputs in High-Z for additional flexibility in system design.