Applied Micro Circuits S3067
The S3067 SONET/SDH transceiver chip is a fully integrated multirate serialization/deserialization SONET OC-48, OC-24, OC-12 and OC-3 interface device. The chip performs all necessary serial-toparallel and parallel-to-serial functions in conformance with SONET/SDH transmission and Forward Error Correction (FEC) standards. The device is suitable for SONET-based WDM applications.| Part No. | S3067 |
|---|---|
| Datasheet | S3067 Download |
| Manufacturer | Applied Micro Circuits |
| Description | Multirate Sonet / SDH / ATM Transceiver w/FEC |
| Buy | Stock & Price |
FEATURES
● SiGe BiCMOS technology● Complies with Bellcore and ITU-T specifications
● On-chip high-frequency PLL for clock generation
● Supports: - OC-48 (with FEC) - OC-24 (with FEC) - OC-12 (with FEC) - OC-3 (with FEC) - Fibre Channel
● FEC capability up to 8 bytes per 255-byte block
● Reference frequency – 131.25 MHz to 178 MHz
● Interface to LVPECL and TTL logic
● 16-Bit single-ended LVPECL data path
● Compact 156 Pin TBGA package
● Diagnostic loopback mode
● Supports line timing
● Lock Detect
● Signal detect input
● Low jitter LVPECL interface
● Internal FIFO to decouple transmit clocks
● Single 3.3 V supply
● Typical power 1.5 W
GENERAL DESCRIPTION
Figure 1 shows a typical network application. On-chip clock synthesis is performed by the highfrequency phase-locked loop on the S3067 transceiver chip allowing the use of a slower external transmit clock reference. The chip can be used with a 131.25 MHz to 178 MHz reference clock in support of existing system clocking schemes. The low jitter LVPECL interface guarantees compliance with the bit-error rate requirements of the Bellcore and ITU-T standards.
