Arizona Microtek AZ100LVE111E
The AZ100LVE111E provides a VBB output for single-ended use or a DC bias reference for AC coupling to the device. For single–ended input applications, the VBB reference should be connected to one side of the IN/IN ¯¯ differential input pair. The input signal is then fed to the other IN/IN ¯¯ input.| Part No. | AZ100LVE111E |
|---|---|
| Datasheet | AZ100LVE111E Download |
| Manufacturer | Arizona Microtek |
| Description | ECL/PECL 1:9 Differential Clock Driver |
| Buy | Stock & Price |
FEATURES
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● Operating Range of 3.0V to 5.5V Low Skew Guaranteed Skew Spec Differential Design Enable VBB Output 75kΩ Internal Input Pulldown Resistors Direct Replacement for ON Semiconductor MC10E111 & MC100E111 PACKAGE PLCC 28 PACKAGE AVAILABILITY PART NO. AZ10LVE111EFN AZ100LVE111EFN MARKING AZ10 LVE111E <Date Code> AZ100 LVE111E <Date Code> NOTES 1,2 PLCC 28 1 2 1,2 Add R2 at end of part number for 13 inch (750 parts) Tape & Reel. Date code format: “YY” for year followed by “WW” for week.
DESCRIPTION
The AZ10/100LVE111E is a low skew 1-to-9 differential driver, designed with clock distribution in mind. The IN signal is fanned-out to nine identical differential outputs. An Enable input is also provided. A HIGH disables the device by forcing all Q outputs LOW and all Q ¯ outputs HIGH. The VBB pin should be used only as a bias for the AZ100LVE111E as its current sink/source capability is limited. When used, the VBB pin should be bypassed to ground via a 0.01μF capacitor. The device is specifically designed, modeled and produced with low skew as the key goal.
