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AZ10LVEL33 - ECL/PECL / 4 Divider

This page provides the datasheet information for the AZ10LVEL33, a member of the AZ100LVEL33 ECL/PECL / 4 Divider family.

Datasheet Summary

Description

The AZ10/100LVEL33 is an integrated ÷4 divider.

The RESET pin is asynchronous and clears the output (Q Low, Q ¯ High) on the rising edge.

Upon power-up, the internal flip-flop will be in a random logic state.

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Datasheet preview – AZ10LVEL33

Datasheet Details

Part number AZ10LVEL33
Manufacturer Arizona Microtek
File Size 153.83 KB
Description ECL/PECL / 4 Divider
Datasheet download datasheet AZ10LVEL33 Datasheet
Additional preview pages of the AZ10LVEL33 datasheet.

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Full PDF Text Transcription

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www.DataSheet4U.com ARIZONA MICROTEK, INC. AZ10LVEL33 AZ100LVEL33 ECL/PECL ÷4 Divider FEATURES • • • • • • • • PACKAGE Green / RoHS Compliant / Lead (Pb) Free package available Operating Range of 3.0V to 5.5V 470ps Propagation Delay 4.
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