Atmel 29C516E
The 29C516E Atmel EDAC is a very low power flow–through 16–bit Error Detection And Correction unit (EDAC) with two user data buses. The EDAC is used in a high integrity system for monitoring and correction of data values coming from the memory space. When performing a read operation from memory, the 29C516E verifies the entire checkword and data combination.| Part No. | 29C516E |
|---|---|
| Datasheet | 29C516E Download |
| Manufacturer |  Atmel |
| Description | 16 Bit Flow Through EDAC Error Detection And Correction unit |
| Buy | Stock & Price |
FEATURES
D D D D D D D D Very Low Power CMOS 16–Bit operation with 6 or 8 Check Bits Fast Error Detection : 31 ns (max.) Fast Error Correction : 32 ns (max.) Corrects all Single–Bit Errors Detects all Double–Bit Errors Detects some Multi–Bit Errors Detects Chip Errors (x1, x4 & x8 RAM Format) D D D D D D D Correctable and Uncorrectable Error Flags Two User Data Buses User to User Transfer and Listening operation High Drive Capability on Buses : –12.8 mA TTL Compatible Single 5V ±10% Power Supply 100 Pin Multilayer Quad Flat Pack (Flat leaded or L leaded). Atmel Corporation Rev. D (09 Dec. 97) 1 29C516E 3. Interface 3.1. Functional Diagram Figure 1.Functional Diagram 8 CORRECT SYNCHK MEM1 EN1 RD/WR1 CHECK BIT GENERATOR 16 I/O BUFFER 8 MC[0..7] 8 U1D[0..15] U2/U1 TRANS U2D[0..15] 16 16 I/O BUFFER 16 CONTROLLER 16 16 I/O BUFFER 16 29C516E RD/WR2 EN2 MEM2 16 16 16 I/O BUFFER 16 MD[0..15] CERR NCERR N22 SYNDROME DECODER 8 SYNDROME GENERATOR 3.2. Block Diagram Figure 2.Block Diagram VCC CORRECT SYNCHK N22 U1/U2 TRANS U1D[0..15] MC[0..7] EN1 MEM1 RD/WR1 MD[0..15] U2D[0..15] EN2 MEM2 RD/WR2 GND 29C516E CERR NCERR 2 Rev.
