FEATURES
● Utilizes the ARM7TDMI™ ARM® Thumb® Processor Core – High-performance 32-bit RISC Architecture – High-density 16-bit Instruction Set – Embedded ICE (In-circuit Emulation) 128 Kbytes Internal RAM Fully Programmable External Bus Interface (EBI) – Maximum External Address Space of 64 MB – Up to Four Chip Selects – Software Programmable 8-/16-bit External Data Bus 16-channel GPS Correlator – Accuracy: TBD – Time to First Fix: TBD 8-channel Peripheral Data Controller (PDC) 8-level Priority, Individually Maskable, Vectored Interrupt Controller – Three External Interrupts 20 Programmable I/O Lines Three USARTs – Two Dedicated Peripheral Data Controller (PDC) Channels per USART Master/Slave SPI Interface – Two Dedicated Peripheral Data Controller (PDC) Channels – 8- to 16-bit Programmable Data Length – Four External Slave Chip Selects Programmable Watchdog Timer Power Management Controller (PMC) – CPU and Peripherals Can Be Deactivated Individually Clock Manager (CLM) – Geared Master...