SAMA5D22
Features
- ARM Cortex-A5 core ̶ ARMv7-A architecture ̶ ARM Trust Zone ̶ NEON™ Media Processing Engine ̶ Up to 500 MHz ̶ ETM/ETB 8 Kbytes
- Memory Architecture ̶ Memory Management Unit ̶ 32-Kbyte L1 data cache, 32-Kbyte L1 instruction cache ̶ 128-Kbyte L2 cache configurable to be used as an internal SRAM ̶ One 128-Kbyte scrambled internal SRAM ̶ One 160-Kbyte internal ROM
- 64-Kbyte scrambled and maskable ROM embedding Atmel boot loader/Atmel Secure boot loader
- 96-Kbyte unscrambled, unmaskable ROM for NAND Flash BCH ECC table ̶ High-bandwidth scramblable 16-bit or 32-bit Double Data Rate (DDR) multiport dynamic RAM controller supporting up to 512 Mbyte 8-bank DDR2/DDR3 (DLL off only)/DDR3L (DLL off only)/LPDDR1/LPDDR2/LPDDR3, including “on-the-fly” encryption/decryption path ̶ 8-bit SLC/MLC NAND controller, with up to 32-bit Error Correcting Code (PMECC)
Atmel-11267E-ATARM-SAMA5D2-Datasheet_25-Jul-16
- System running up to 166 MHz in typical conditions ̶ Reset controller, shutdown...
