DESCRIPTION
For this, it has an 10-bit, 8 channels A/D converter and a five channels Programmable Counter Array. In addition, the T80C5112 has a Hardware Watchdog Timer with its own low power oscillator, a versatile serial channel that facilitates multiprocessor communication (EUART) with an independent baud rate generator, a SPI serial bus controller and a X2 speed improvement mechanism. The X2 feature allows to keep the same CPU power at a divided by two oscillator frequency. The fully static design of the T80C5112 allows to reduce system power consumption by bringing the clock frequency down to any value, even DC, without loss of data. The T80C5112 has 3 software-selectable modes of reduced activity for further reduction in power consumption. In the idle mode the CPU is frozen while the peripherals are still operating. In the quiet mode, the A/D converter only is operating. In the power-down mode the RAM is saved and all other functions are inoperative. Two oscillators source, crystal and RC, provide a versatile power management.