Atmel TS68EN360
The TS68EN360 QUad Integrated Communication Controller (QUICC™) is a versatile one-chip integrated microprocessor and peripheral combination that can be used in a variety of controller applications. It particularly excels in communications activities. The QUICC (pronounced “quick”) can be described as a next-generation TS68302 with higher performance in all areas of device operation, increased flexibility, major extensions in capability, and higher integration.FEATURES
● CPU32+ Processor (4.5 MIPS at 25 MHz) – 32-bit Version of the CPU32 Core (Fully Compatible with the CPU32) – Background Debug Mode – Byte-misaligned Addressing Up to 32-bit Data Bus (Dynamic Bus Sizing for 8 and 16 Bits) Up to 32 Address Lines (At Least 28 Always Available) Complete Static Design (0 - 25 MHz Operation) Slave Mode to Disable CPU32+ (Allows Use with External Processors) – Multiple QUICCs Can Share One System Bus (One Master) – TS68040 Companion Mode Allows QUICC to be a TS68040 Companion Chip and Intelligent Peripheral (22 MIPS at 25 MHz) – Peripheral Device of TSPC603e (see DC415/D note) Four General-purpose Timers – Superset of MC68302 Timers – Four 16-bit Timers or Two 32-bit Timers – Gate Mode Can Enable/Disable Counting Two Independent DMAs (IDMAs) System Integration Module (SIM60) Communications Processor Module (CPM) Four Baud Rate Generators Four SCCs (Ethernet/IEEE 802.3 Optional on SCC1-Full 10 Mbps Support) Two SMC VCC = +5V ± 5% fmax = 25 MHz and 3...