AS4SD16M16 Description
The 256MB SDRAM is a high-speed CMOS, dynamic random-access memory containing 268,435,456 bits. It is internally configured as a quad-bank DRAM with a synchronous interface (all signals are registered on the positive edge of the clock signal, CLK). Each of the 67,108,864-bit banks is organized as 8,192 rows by 512 columns by 16 bits.
AS4SD16M16 Key Features
- Full Military temp (-55°C to 125°C) processing available
- Configuration: 16 Meg x 16 (4 Meg x 16 x 4 banks)
- Fully synchronous; all signals registered on positive edge of system clock
- Internal pipelined operation; column address can be changed every clock cycle
- Internal banks for hiding row access/precharge
- Programmable burst lengths: 1, 2, 4, 8 or full page
- Auto Precharge, includes CONCURRENT AUTO PRECHARGE and Auto Refresh Modes
- Self Refresh Mode (IT)
- 64ms, 8,192-cycle refresh (IT)
- <24ms 8,192 cycle recfresh (XT)