Description
Address Inputs Column Enable DRAM Data In-Out/Write-Mask Bit Serial Enable Row Enable Serial Data Clock Serial Data In-Out Transfer Register/Q Output Enable Write-Mask Select/Write Enable Special Function Select Split-Register Activity Status 5V Supply Ground Ground (Important: Not Connected to inte
Features
- Class B High-Reliability Processing.
- DRAM: 262144 Words × 4 Bits SAM: 512 Words × 4 Bits.
- Single 5-V Power Supply (±10% Tolerance).
- Dual Port Accessibility.
- Simultaneous and Asynchronous Access From the DRAM and SAM Ports.
- Bidirectional-Data-Transfer Function Between the DRAM and the Serial-Data Register.
- 4 × 4 Block-Write Feature for Fast Area Fill Operations; As Many as Four Memory Address Locations Written per Cycle From an On-Chip.