Austin Semiconductor MT4C1004J883C
The MT4C1004J is a randomly accessed solid-state memory containing 4,194,304 bits organized in a x1 configuration.FEATURES
● Industry standard x1 pinout, timing, functions and packages● High-performance, CMOS silicon-gate process
● Single +5V ± 10% power supply
● Low-power, 2.5mW standby; 300mW active, typical
● All inputs, outputs and clocks are fully TTL and CMOS compatible
● 1,024-cycle refresh distributed across 16ms
● Refresh modes: /R?A/S-ONLY, /C/A/S-BEFORE-/R/?A/S (CBR), and HIDDEN
● FAST PAGE MODE access cycle
● CBR with ?W/E a HIGH (JEDEC test mode capable via WCBR) 2 4 6 8 10 12 14 16 18 20 CAS Vss WE A10* NC A1 A3 A4 A6 A8 OPTIONS
● Timing 70ns access 80ns access 100ns access 120ns access
● Packages Ceramic DIP (300 mil) Ceramic DIP (400 mil) Ceramic LCC Ceramic SOJ Ceramic ZIP Ceramic Gull Wing MARKING - 7 - 8 -10 -12 20-Pin SOJ 20-Pin LCC 20-Pin Gull Wing D WE RAS NC *A10 1 2 3 4 5 26 25 24 23 22 Vss Q CAS NC A9 CN C ECN ECJ CZ ECG No. 101 No. 102 No. 202 No. 504 No. 400 No. 600 A0 A1 A2 A3 Vcc 9 10 11 12 13 18 17 16 15 14 A8 A7 A6 A5 A4 *Address not used for /R/A/S-ONLY REFRESH GEN...