Datasheet Details
| Part number | MT4C4001J |
|---|---|
| Manufacturer | Austin Semiconductor |
| File Size | 276.87 KB |
| Description | 1 MEG x 4 DRAM Fast Page Mode DRAM |
| Datasheet |
 MT4C4001J Datasheet
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General Description
The MT4C4001J is a randomly accessed solid-state memory containing 4,194,304 bits organized in a x4 configuration.
During READ or WRITE cycles each bit is uniquely addressed through the 20 address bits which are entered 10 bits (A0-A9) at a time.
Key Features
- Industry standard x4 pinout, timing, functions, and packages.
- High-performance, CMOS silicon-gate process.
- Single +5V±10% power supply.
- Low-power, 2.5mW standby; 300mW active, typical.
- All inputs, outputs, and clocks are fully TTL and CMOS compatible.
- 1,024-cycle refresh distributed across 16ms.
- Refresh modes: RAS-ONLY, CAS-BEFORE-RAS (CBR), and HIDDEN.
- FAST PAGE MODE access cycle.
- CBR with WE a HIGH (JEDEC test mo.