MT5C2561 Datasheet | Austin Semiconductor

SRAM Austin Semiconductor, Inc. 256K x 1 SRAM SRAM MEMORY ARRAY AVAILABLE AS MILITARY SPECIFICATIONS - SMD 5962-88725 - SMD 5962-88544 - MIL-STD-883 PIN ASSIGNMENT (Top View) 24-Pin DIP (C) (300 MIL) A6 A7 A8 A9 A10 A11 A14 A15 A0 Q WE Vss 1 2 3 4 5 6 7 8 9 10 11 12 24 23 22 21 20 19 18 17 16 15 14 13 Vcc A5 A4 A3 A2 A1 A17 A16 A13 A12 D CE Features - - - - High Speed: 35, 45, 55, and 70 Battery Backup: 2V data retention Low power standby High-performance, low-power, CMOS double-metal process - Single +5V (+10%) Power Supply - Easy memory expansion with CE - All inputs and outputs are TTL patible 28-Pin LCC (EC) .. - Timing 35ns access 45ns access 55ns access 70ns access - Package(s) Ceramic DIP (300 mil) Ceramic LCC -35 -45 -55- -70- A8 A7 A6 Vcc A17 3 2 1 28 27 NC 4 A9 5 A10 6 A11 7 A14 8 A15 9 A0 10 Q 11 NC 12 13 14 15 16 17 A12 D CE Vss WE 26 25 24 23 22 21 20 19 18 NC A4 A3 A2 A1 A17 A16 A13 NC OPTIONS MARKING C EC No. 106 No. 204 - Operating Temperature Ranges Industrial (-40o C to +85o C) IT Military (-55o C to +125o C) XT - 2V data retention/low power L GENERAL DESCRIPTION The Austin Semiconductor SRAM family employs high-speed, low-power CMOS and are fabricated using doublelayer metal, double-layer polysilicon technology. For flexibility in high-speed memory applications, Austin Semiconductor offers chip enable (CE) on all organizations. This enhancement can place the outputs in High-Z for additional flexibility in system design. The x1 configuration Features separate data input and output. Writing to these devices is acplished when write enable (WE) and CE inputs are both LOW. Reading is acplished when WE remains HIGH and CE goes LOW. The device offers a reduced power standby mode when disabled. This allows system designs to achieve low standby power requirements. These devices operate from a single +5V power supply and all inputs and outputs are fully TTL...