SM55161A Overview
Address inputs Column-Address Strobe/Byte Selects DRAM Data I/O, Write Mask Data Special Function Select Special-Function Select No Connect/Ground (NOTE: Not connected internally to VSS) Special-Function Output Row-Address Strobe Serial Clock Serial Enable Serial-Data Output Output Enable, Transfer Select 5V Supply (TYP) Ground DRAM Write-Enable Select OPTIONS Timing 70ns access 75ns access 80ns access Package 68...
SM55161A Key Features
- Organization
- DRAM: 262 144 by 16 Bits
- SAM: 512 by 16 Bits
- Dual-Port Accessibility
- Simultaneous and Asynchronous Access From the DRAM and SAM Ports
- Bidirectional Data-Transfer Function From the DRAM to the Serial-Data Register, and from Serial Data Register to DRAM
- (8 x 8) x 2 Block Write feature for fast area fill
- Write-Per-Bit Feature for Selective Write to Each RAM I/O; Two Write-Per-Bit Modes to Simplify System Design
- Byte-Write Control (CASL, CASU) Provides Flexibility
- Extended Data Output for Faster System Cycle Time