DESCRIPTION
A simplified block diagram of the device is shown in Figure 1-1. The AVL2108 includes dual, differential, high performance, analog to digital converters (ADC) with a built-in compensation circuit for DC offset and IQ imbalance. An RF AGC output is provided for simple gain control of the satellite tuner via an RC network. After passing a timing recovery loop and frequency recovery loop, the signal samples are further processed by an equalizer to output decision bits to an FEC decoder. The decoded bits are finally packetized in the MPEG interface block. The configuration of the AVL2108 is easily performed through a set of registers via a standard two-wire bus. To simplify the interface to the host system, this same twowire bus is used to communicate with the separate tuner two-wire bus and the DiSEqC™ interface to the LNB. The AVL2108 can achieve fast acquisition at frequency offsets up to 5 MHz and maintains synchronization under the most severe frontend phase noise. Applica...
