AverLogic Technologies AL4V183
The AL4V183/185 series memory products are high-performance, low-power 18-bit read/write FIFO (First-In-First-Out) memory chip designed to buffer high speed streaming data for a wide range of applications, such as optical disk data caching, video line data buffering. This product series supports bus conversion functions, such as Bus-Matching, Endian selection that can reduce designing efforts. The built-in address decoder and pointer managing circuits provide a straightforward bus interface to serially read/write memory that reduces inter-chip design efforts.| Part No. | AL4V183 |
|---|---|
| Datasheet | AL4V183 Download |
| Manufacturer |  AverLogic Technologies |
| Description | Line FIFO |
| Buy | Stock & Price |
APPLICATIONS
Multimedia System Video line capture TBC(Time Base Corrector) Hard Disk cache memory Anti-skip audio data bufferFEATURES
●●
●
●
●
●
●
●
● High performance, low-power, FIFO(First-In First-Out) memory 1K x18 bit 1/O port (AL4V183) 4K x18 bit I/O port (AL4V185) High clock speed (100 MHz) Fully independent read/write access Output enable control (data skipping) User selectable input and output bus width Big/Little-Endian word format selectable 3.3V±10% power supply with 5V signal input tolerance Standard 64-pin STQFP
DESCRIPTION
● Ordering Information Part number Package Power Supply AL4V183, AL4V185 64-pin plastic STQFP +3.3V±10% 48 49 33 32 AVERLOGIC AL4V18X X-XX-XX XXXXX XXXX 64 17 1 16 STQFP PACKAGE TOP VIEW /OE Input data bus Input Buffer (1k , 4k) x18 Memory Array Output Buffer Output data bus WCLK /WEN /WRSTB Write Control Logic Write Pointer Read Control Logic Read Pointer RCLK /REN /RRSTB /BEB /IW /OW Offset Regissers Timing & Control Logic Figure 1. AL4V18x FIFO Block Diagram The 18bit input and output ports operate independently at a maximum speed of 100 MHz.