BL24C256 Datasheet | BELLING

Shanghai Belling Corp., Ltd BL24C128/BL24C256 128K bits (16,384 X 8) / 256K bits (32,768 X 8) Two-wire Serial EEPROM Features Two-wire Serial Interface VCC = 1.7V to 5.5V Bi-directional Data Transfer Protocol Internally Organized BL24C128, 16,384 X 8 (128K bits) BL24C256, 32,768 X 8 (256K bits) 1 MHz(5V), 400 k Hz (1.7V, 2.5V, 2.7V) patibility 64-byte Page (128K/256K) Write Modes Partial Page Writes Allowed Self-timed Write Cycle (5 ms max) High-reliability 1 Million Write Cycles guaranteed Data Retention > 100 Years Operating Temperature: -40℃ to +85℃ 8-lead PDIP, 8-lead SOP and 8-lead TSSOP Packages BL24C128/256 Pin Configuration Description BL24C128/BL24C256 provides 131,072/262,144 bits of serial electrically erasable and programmable read-only memory (EEPROM) organized as 16,384/32,768 words of 8 bits each. The device is optimized for use in many industrial and mercial applications where low-power and low-voltage operations are essential. The BL24C128/BL24C256 is available in space-saving 8-lead PDIP, 8-lead SOP, and 8-lead TSSOP packages and is accessed via a two-wire serial interface. Shanghai Belling Corp., Ltd Pin Descriptions Block Diagram BL24C128/256 Shanghai Belling Corp., Ltd BL24C128/256 DEVICE/PAGE ADDRESSES ( A1 and A0): The A1 and A0 pins are device address inputs that are hard wired for the BL24C128/BL24C256. Four 128k/256k devices may be addressed on a single bus system (device addressing is discussed in detail under the Device Addressing section). SERIAL DATA (SDA): The SDA pin is bi-directional for serial data transfer. This pin is open-drain driven and may be wire-ORed with any number of other open-drain or open- collector devices. SERIAL CLOCK (SCL): The SCL input is used to positive edge clock data into each EEPROM device and negative edge clock data out of each device. WRITE PROTECT (WP): The BL24C128/BL24C256 has a Write Protect pin that provides hardware data protection. The Write Protect pin allows normal read/write...