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ADS5272 - 65MSPS ADC

Download the ADS5272 datasheet PDF. This datasheet also covers the ADS5272_Burr variant, as both devices belong to the same 65msps adc family and are provided as variant models within a single manufacturer datasheet.

General Description

The ADS5272 is a high-performance, 65MSPS, 8-channel, parallel analog-to-digital converter (ADC).

Internal references are provided, simplifying system design requirements.

Low power consumption allows for the highest of system integration densities.

Key Features

  • or LSB first. The bit coinciding with the rising edge of the 1x clock output is the first bit of the word. Data is to be latched by the receiver on both the rising and falling edges of the 6x clock. The ADS5272 provides internal references, or can optionally be driven with external references. Best performance can be achieved through the internal reference mode. The device is available in a TQFP-80 PowerPAD package and is specified over a.
  • 40°C to +85°C operating range. 6X ADCLK LCLKP.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (ADS5272_Burr-BrownCorporation.pdf) that lists specifications for multiple related part numbers.

📁 Similar Datasheet

Part Number Description Manufacturer
ADS5272 Analog-to-Digital Converters Texas Instruments
ADS5270 Analog-to-Digital Converters Texas Instruments
ADS5271 Analog-to-Digital Converters Texas Instruments
ADS5273 Analog-to-Digital Converters Texas Instruments
ADS5277 Analog-to-Digital Converters Texas Instruments

Other Datasheets by Burr-Brown (Texas Instruments)

Part Number Description
ADS5270 8-Channel 12-Bit 40MSPS ADC
ADS5271 50MSPS ADC
ADS5273 70MSPS ADC
ADS5277 65MSPS Analog-to-Digital Converter
ADS5220 ANALOG-TO-DIGITAL CONVERTER

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
ADS5272 SBAS324 − JUNE 2004 8-Channel, 12-Bit, 65MSPS ADC with Serial LVDS Interface D Maximum Sample Rate: 65MSPS D 12-Bit Resolution D No Missing Codes www.DataSheet4U.com D Power Dissipation: 996mW D CMOS Technology D Simultaneous Sample-and-Hold D 70.5dB SNR at 10MHz IF D Internal and External References D 3.3V Digital/Analog Supply D Serialized LVDS Outputs D Integrated Frame and Synch Patterns D MSB and LSB First Modes D Option to Double LVDS Clock Output Currents D Pin- and Format-Compatible Family D TQFP-80 PowerPAD Package FEATURES or LSB first. The bit coinciding with the rising edge of the 1x clock output is the first bit of the word. Data is to be latched by the receiver on both the rising and falling edges of the 6x clock.