Datasheet Summary
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Dual HDSL/SDSL ANALOG FRONT END
Features q SERIAL DIGITAL INTERFACE q 48-LEAD SSOP PACKAGE q E1, T1 AND SDSL OPERATION q 64kbps TO 1168kbps OPERATION q SCALEABLE DATA RATE q 250mW POWER DISSIPATION PER CHANNEL q TWO PLETE HDSL ANALOG INTERFACES q +5V POWER (5V or 3.3V Digital)
DESCRIPTION
Burr-Brown’s dual Analog Front End chip greatly reduces the size and cost of a DSL (Digital Subscriber Line) system by providing all of the active analog circuitry needed to connect two digital signal processors to external promise hybrids and line transformers. The AFE2124 is optimized for...