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DAC709 - Microprocessor-Compatible 16-BIT DIGITAL-TO-ANALOG CONVERTERS

Download the DAC709 datasheet PDF. This datasheet also covers the DAC709_Burr variant, as both devices belong to the same microprocessor-compatible 16-bit digital-to-analog converters family and are provided as variant models within a single manufacturer datasheet.

General Description

The DAC708 and DAC709 are 16-bit converters designed to interface to an 8-bit microprocessor bus.

16bit data is loaded in two successive 8-bit bytes into parallel 8-bit latches before being transferred into the D/A latch.

Key Features

  • q TWO-CHIP.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (DAC709_Burr-BrownCorporation.pdf) that lists specifications for multiple related part numbers.

📁 Similar Datasheet

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Other Datasheets by Burr-Brown (Texas Instruments)

Part Number Description
DAC701 Monolithic 16-Bit DIGITAL-TO-ANALOG CONVERTERS
DAC702 Monolithic 16-Bit DIGITAL-TO-ANALOG CONVERTERS
DAC707 Microprocessor-Compatible 16-BIT DIGITAL-TO-ANALOG CONVERTERS
DAC708 Microprocessor-Compatible 16-BIT DIGITAL-TO-ANALOG CONVERTERS
DAC712 16-BIT DIGITAL-TO-ANALOG CONVERTER

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
® DAC707 DAC708 DAC709 Microprocessor-Compatible 16-BIT DIGITAL-TO-ANALOG CONVERTERS FEATURES q TWO-CHIP CONSTRUCTION q HIGH-SPEED 16-BIT PARALLEL, 8-BIT (BYTE) PARALLEL, AND SERIAL INPUT MODES q DOUBLE-BUFFERED INPUT REGISTER CONFIGURATION q VOUT AND IOUT MODELS q HIGH ACCURACY: Linearity Error ±0.003% of FSR max Differential Linearity Error ±0.006% of FSR max q MONOTONIC (TO 14 BITS) OVER SPECIFIED TEMPERATURE RANGE q HERMETICALLY SEALED q LOW COST PLASTIC VERSIONS AVAILABLE (DAC707JP/KP) DESCRIPTION The DAC708 and DAC709 are 16-bit converters designed to interface to an 8-bit microprocessor bus. 16bit data is loaded in two successive 8-bit bytes into parallel 8-bit latches before being transferred into the D/A latch.