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CED71A3/CEU71A3
Dec. 2002
N-Channel Logic Level Enhancement Mode Field Effect Transistor
FEATURES
30V , 65A , RDS(ON)=10m Ω @VGS=10V. RDS(ON)=14m Ω @VGS=5.0V. Super high dense cell design for extremely low RDS(ON). High power and current handling capability. TO-252 & TO-251 package.
D
6
G
D G S
G D S
CEU SERIES TO-252AA(D-PAK)
CED SERIES TO-251(l-PAK)
S
ABSOLUTE MAXIMUM RATINGS (Tc=25 C unless otherwise noted)
Parameter Drain-Source Voltage Gate-Source Voltage Drain Current-Continuous -Pulsed Drain-Source Diode Forward Current Maximum Power Dissipation @Tc=25 C Derate above 25 C Operating and Storage Temperature Range Symbol VDS VGS ID IDM IS PD TJ, TSTG Limit 30 Unit V V A A A W W/ C C
Ć20
65 100 65 69 0.
CED71A3 Datasheet
