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CEF08N2
Nov. 2002
N-Channel Logic Level Enhancement Mode Field Effect Transistor
FEATURES
250V , 6A , RDS(ON)=450m Ω @VGS=10V. Super high dense cell design for extremely low RDS(ON). High power and current handling capability. TO-220F full-pak for through hole
D
G
G D S
S
TO-220F
ABSOLUTE MAXIMUM RATINGS (Tc=25 C unless otherwise noted)
Parameter Drain-Source Voltage Gate-Source Voltage Drain Current-Continuous -Pulsed Drain-Source Diode Forward Current Maximum Power Dissipation @Tc=25 C Derate above 25 C Operating and Storage Temperautre Range Symbol VDS VGS ID IDM IS PD TJ, TSTG Limit 250 Unit V V A A A W W/ C C
Ć 30
6 24 6 38 0.3 -50 to 150
THERMAL CHARACTERISTICS
Thermal Resistance, Junction-to-Case Thermal Resistance, Junction-to-Ambient
1
RįJC RįJA
3.
CEF08N2 Datasheet
