CHL8112B Datasheet | CHiL Semiconductor

PRODUCT BRIEF PRELIMINARY CHL8112A/B DIGITAL MULTI-PHASE BUCK CONTROLLER Features 5-phase dual output PWM Controller Phases are flexibly assigned between Loops 1 & 2 AMD® SVI/G34 & Memory MPo L modes Dual OCP support for I-spike enhanced AMD CPUs SMB_Alert Pin for Servers PMBus Address pin or Variable Gate Drive (CHL8112A) 2nd Temperature Sense (CHL8112B) Overclocking & Gaming Mode with Vmax setting Switching frequency from 200k Hz to 1.2MHz per phase CHi L Efficiency Shaping Features including Variable Gate Drive (CHL8112A only), Dynamic Phase Control Programmable 1-phase or 2-phase for Light Loads and Active Diode Emulation for Very Light Loads CHi L Adaptive Transient Algorithm (ATA) on both loops minimizes output bulk capacitors and system cost Designed for use with coupled inductors Auto-Phase Detection with auto-pensation Per-Loop Fault Protection: OVP, UVP, OCP, OTP, CFP I2C/SMBus/PMBus system interface for telemetry of Temperature, Voltage, Current & Power for both loops...